|
library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_arith.all; use ieee.std_logic_unsigned.all; entity exp10 is port( Clk : in std_logic; --时钟输入 Rst : in std_logic; --复位输入 NU,ND : in std_logic; --输入：控制频率的改变 MU,MD : in std_logic; --输入：控制占空比的改变 Fout : out std_logic --波形输出 ); end exp10; architecture behave of exp10 is signal N_Buffer,M_Buffer : std_logic_vector(10 downto 0); signal N_Count :std_logic_vector(10 downto 0); signal clkin : std_logic; signal Clk_Count : std_logic_vector(12 downto 0); --产生一个低速时钟，用于按键判断 begin process(Clk) --计数器累加 begin if(Clk'event and Clk='1') then if(N_Count=N_Buffer) then N_Count<="00000000000"; else N_Count<=N_Count+1; end if; end if; end process; process(Clk) --波形判断 begin if(Clk'event and Clk='1') then if(N_Count<M_Buffer) then Fout<='1'; elsif(N_Count>M_Buffer and N_Count<N_Buffer) then Fout<='0'; end if; end if; end process; process(Clk) begin if(Clk'event and Clk='1') then Clk_Count<=Clk_Count+1; end if; clkin<=Clk_Count(12); end process; process(clkin) --频率及占空比的改变1 begin if(clkin'event and clkin='0') then if(Rst='0') then M_Buffer<="01000000000"; N_Buffer<="10000000000"; elsif(NU='0') then N_Buffer<=N_Buffer+1; elsif(ND='0') then N_Buffer<=N_Buffer-1; elsif(MU='0') then M_Buffer<=M_Buffer+1; elsif(MD='0') then M_Buffer<=M_Buffer-1; end if; end if; end process; end behave; | 
发表于 2015-12-6 11:09
收藏
分享
支持
反对
楼主
